(China (Mainland))
Product Summary
The K4S641632K-UI75 is a Synchronous DRAM. The K4S641632K-UI75 is organized as 4 x 2,097,152 words by 8 bits,/4×1,048,576 words by 16 bits, fabricated with SAMSUNG’s high performance CMOS technology. The K4S641632K-UI75 allows precise cycle control with the use of system clock I/O transactions is possible on every clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the same device to be useful for a variety of high bandwidth, high performance memory system applications.
Parametrics
K4S641632K-UI75 absolute maximum ratings: (1)Voltage on any pin relative to VSS VIN, VOUT: -1.0V to 4.6V; (2)Voltage on VDD supply relative to VSS VDD, VDDQ: -1.0V to 4.6V; (3)Storage temperature TSTG: -55℃ to +150℃; (4)Power dissipation PD: 1W; (5)Short circuit current IOS: 50mA.
Features
K4S641632K-UI75 features: (1)JEDEC standard 3.3V power supply; (2)LVTTL compatible with multiplexed address; (3)Four banks operation; (4)MRS cycle with address key programs: CAS latency (2 & 3), Burst length (1, 2, 4, 8 & Full page), Burst type (Sequential & Interleave); (5)All inputs are sampled at the positive going edge of the system clock; (6)Burst read single-bit write operation; (7)DQM (x8) & L(U)DQM (x16) for masking; (8)Auto & self refresh; (9)64ms refresh period (4K cycle); (10)Pb/Pb-free Package; (11)RoHS compliant for Pb-free Package.
Diagrams
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K4S640432H-TC(L)75 |
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K4S640432H-UC |
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K4S640832C |
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K4S640832D |
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